1. Field of the Invention
The present invention generally relates to a method and apparatus for test case generation and more particularly to a method and apparatus for verifying sequences of arithmetic processor instructions (especially floating point instructions) with varying data to produce correct (expected) results via test cases.
2. Description of the Related Art
A conventional z7 floating point unit (FPU) implements several hundred instructions and multiple different number formats. For simulation, test cases are used to verify the correctness of the FPU. A test case should cover “interesting” scenarios, e.g., reuse of previously generated results, exceptions, instructions that use different formats, etc. A test case may consist of initial values, instructions, and expected results.
In order to simulate a FPU, conventional random test case generators are used. Conventional random test generators are very fast but do not provide much control on the instructions/operands that get generated. In addition, in the conventional random test generators usually only initial values can be specified.
Another conventional method to simulate a FPU employs constraint-solving based test case generators (for example, the FPgen test case generator). Constraint-solving based test case generators provide total user-control over the generation of one instruction, but are very slow.
With the conventional test case generators, it is impossible to generate interesting test cases with full control over their generation.
As a result, the conventional test case generators tend to generate large amounts of untargeted random tests and try to get good coverage. As a result, coverage implementation is very time intensive and it is hard to close coverage holes.
On the other hand, another conventional method to generate test cases includes manually creating a small number of tests with the interesting scenarios. The drawback for this method is that it can only be done for a very small number of tests.
Another conventional method of test case generation is to use constraint-solving based test case generators such as FPgen to generate one interesting instruction and randomly generate instructions around it. However, coverage analysis is needed to find out whether the interesting scenario was hit or not.